Isolation in a conventional semiconductor device has been achieved using a planar technique. However, with high integration, it is becoming difficult to incorporate many elements within an allowed chip size using only the conventional planar technique. It is considered beneficial to have a trench structure introduced into an isolation layer or capacitance in a DRAM. However, when such a trench structure is used, it is necessary to controllably introduce impurities such as boron or arsenic into the side wall of the trench in the manufacturing processes for producing the semiconductor device.